Saturday, January 5, 2019

Tali Forth 2 version 1.0 released

If things have been quiet around here, well, one reason is that Tali Forth 2 has taken up so much of my free time. That is a good thing, because it has now reached something close to stability with the version 1.0. It's been pretty exactly six years since I started.

Tali now supports blocks and wordlists, comes with an assembler and disassembler for Simpler Assembler Notation (SAN), and two editors - a classic retro block editor and a clone of the Unix line-editor ed, which I'll be writing more about in the future. The code is amazingly stable, thanks to a test suite that is so comprehensive that it runs sections in parallel so it doesn't take forever. The documentation is about 120 pages in the PDF version and includes tutorials. This has really, really turned out well.

This wasn't all my doing by a long shot. Sam Colwell put in an enormous amount of work, especially with stuff that improved the quality by leaps and bounds like the test suite or the glossary. I had always been ho-hum about blocks, he included them, and a tutorial on how to use them. I learned about ditaa and that I suck at Makefiles (working on that). He also kindly provided me with a version of his 65c02 SBC. Once I dig out the ROM burner again, I'll have real hardware with actual mass storage to run Tali on.

Tali isn't quite done. At some point I want to try adding multitasking, probably of the cooperative round-robin sort. Some of the code needs to be optimized, and it would be nice to have one of those flashy block editors you can move around in with the arrow keys. But for now, it's time to take a break and do something else. More around here, for one thing.

Saturday, March 10, 2018

A Return to LaTex

When I started writing the documentation for Tali Forth, it was in plain ASCII. Quick to write, but it looked like crap. Then I switched some stuff to Markdown, and for a while, I convinced myself it looked better. Maybe it did. But last week, I had to admit it still sucks.

Then I remembered LaTeX.

It's been almost two decades since I last used LaTeX -- the two books on my shelf on the subject still have prices in Mark ("DM 79,90").  I remember those days, drooling over laser printers with price tags that seemed forever beyond the reach of mere mortals. I remember it took a whole tool chain and a measurable amount of time for the finished document to be rendered.

Almost 20 years later, LaTeX has become dramatically, nay, ridiculously easy to use. Installation is two calls to apt-get (one for pdflatex, the other for more fonts, because you can never have enough fonts). PDFs are spit out immediately. The speed at which things get done is amazing. Some of this is 20 years more experience with vim, of course, but that is part of it: I can use the most powerful editor on the planet for both code and documentation.

But the biggest change comes from online search engines. At the level I'm using LaTeX, there are no new problems. Every question has an answer, a tutorial, endless examples. Going back to the books was more an act of nostalgia than actually useful -- it just takes too much time. The final result is much, much better, especially because the PDF version comes with internal hyperlinks. Some things never change, of course: I still suck at title pages.

Oh, and I actually own a laser printer now. Maybe in another 20 years, I'll be able to afford a graphics card.

Tuesday, March 6, 2018

So of course Forth has already been ported to the RISC-V

Well, that didn't take long.

There is a first experimental native-code port of Forth -- Mecrisp Forth, to be exact -- to the RISC-V (RV32IM), as the German Forth group Forth e.V. announced on Tuesday (in German). You can find it on the download page as Mecrisp Quintus.

One note of warning: There is this line HIC SUNT DRACONES in the README, which obviously translates to "dragons might get hiccups". So if you're a dragon, be careful!

Thursday, February 22, 2018

Venus, a web-based simulator for RISC-V instructions

For those looking for a way to fool around with RISC-V assembler without the hassle of installing an emulator, Keyhan Vakil has created an online instruction simulator called Venus at It's RV32IM -- basic integer and multiplication functions. The GitHub page is at

Venus was built for education, and it seems Prof. Martin Schoeberl at the Technical University of Denmark uses it in his course Computer Architecture and Engineering. Some of the class notes with (very, very simple) RISC-V code are on GitHub at

(Speaking of code, at the moment, I'm finding it hard to get into RISC-V quickly because of a lack of non-trivial examples that explain why which commands were chosen -- which structures are recommended for, say, even simple loops over strings. The RISC-V Reader by David Patterson and Andrew Waterman is good, but a very brief introduction. What seems to be missing is the equivalent of Lance Leventhal's legendary 6502 Assembly Language Programming or, even more useful, his 6502 Assembly Language Subroutines.)

Sunday, February 18, 2018

ALPHA version of Tali Forth 2 for the 65c02 released

Hence plan to throw one away; you will, anyhow.
-- Fred Brooks, "The Mythical Man-Month"

Yeah, so that really wasn't the original plan. But the first version of Tali Forth, the first Forth I ever wrote, turned out to be so horrible under the hood that in the end, it was easier to start over with what I had learned through Liara Forth for the 65816. Of course, the first thing that Liara taught me was that a 16-bit CPU is so much more powerful than an 8-bit CPU that it isn't even funny ... once you you have tasted 16-bit ...

No, we must stay strong! I've now coded all words of the new version of Tali Forth (at and so I'm declaring this an ALPHA release. "ALPHA" in this context means that "everything does something, and usually even the right thing". You can run it out of the box with your py65 simulator.

Tuesday, February 13, 2018

So this guy is building his own RISC-V CPU

Did I mention RISC-V in the last posting? Turns out that Robert Baruch is building his own RISC-V CPU [YouTube] out of chips.
The LMARV-1 (Learn Me A Risc-V, version 1) is a RISC-V processor built out of MSI and LSI chips. You can point to pieces of the processor and see the data flow. It should be a nice way of demonstrating how RISC-V works and how simple it is to implement.
The video also includes a good introduction to RISC-V itself. (Via Hackaday)

Saturday, February 3, 2018

Current projects: and Tali Forth 2

One of the strange things about getting older are the curious and somewhat uncanny attacks of self-discipline. These days, instead of my usual rushing off and doing three, four, five projects at once, which then each proceed at a crawl, I have managed to cut the number down to two at a time. Two! And lo and behold, you actually make progress that way.

Currently, those two projects are:

A rewrite of for OpenZFS in Python 3

ZFS, or more common these days, OpenZFS, is a next-generation file system that puts the emphasis on really, really, really keeping your data safe at the cost of higher hardware requirements (Adam Leventhal claims that it was almost Apple's next file system). I got my initial hands-on experience when I built my first own FreeNAS server -- FreeNAS is based on FreeBSD. ZFS comes with a brutal learning curve, but rewards your pain with seriously advanced features. In FreeBSD Mastery: ZFS, Michael Lucas and Allan Jude famously speculate:

The Enterprise's computer on Star Trek probably runs ZFS.

After a while, the paranoia built into ZFS becomes infectious, and it becomes hard to take file systems seriously that don't checksum every single byte of data. By now, I've moved my Ubuntu home partition over to ZFS.

Now, buried in a far-away corner of OpenZFS in the Linux GitHub tree is small program called which provides information on the Adjustable Replacement Cache (ARC) of ZFS. The original version was written by Ben Rockwood in Perl for Solaris in 2008, and was later ported to Python and (among other things) Linux. However, the Perl roots kept showing, and Pythonic this wasn't. So I did some cleanups under the hood, which was fun -- not the least because the people in charge of OpenZFS on Linux are enormously helpful and friendly even if you ask really stupid questions.

However, was written for Python 2, and Python 2 it must remain because ZFS is backwards compatible to various ancient operating systems. This is frustrating, because the only thing worse than Python 2 is old Python 2. So, to finally get to the point, I've started a complete rewrite of in Python 3. In the grand scheme of ZFS, this is sort of like reorganizing the broom closet in the Sistine Chapel -- but hey, it's the Sistine Chapel. This project should be completed soon.

A rewrite of Tali Forth for the 65c02

Tali Forth was the first Forth I every wrote myself. It, ah, worked. After that, I wrote Liara Forth for the 65816, which was far, far better because I kinda-sorta knew what I was doing. After that (and a whole lot of further reading), the original Tali Forth looked silly, so I'm doing a clean rewrite named, obviously, Tali Forth 2.

Beyond minor technical differences, Tali Forth 2 should be far easier for other people to port their own 65c02 projects to. This time, I'm writing it for the Py65 simulator and trying to strictly isolate all hardware dependencies. A Forth is always fun to code because you can just do a word here, a word there as time allows once the main loop is up and running.

And after that?

We'll see. One thing I'm considering is trying my hand at RISC-V assembler now that there is actual hardware to run it on. Also, there doesn't seem to a modern implementation of Lisp for the 6502, which would be so completely different from Forth that it sounds like fun. And then ...

... nope, only two projects at a time. Because, like, adult.